Discover the power of deterministic and parallel programming with LabVIEW Real-Time and FPGA. This hands-on training teaches you how to build reliable, high-performance systems for time-critical measurement and control applications.
Practical Information
| Duration | 3 days |
| Level | Advanced |
| For whom | LabVIEW developers who want to work with Real-Time and FPGA systems |
| Prerequisites | Experience with LabVIEW (at least Fundamentals level) |
| Language | Dutch or English |
| Location | Weert (The Netherlands) or on-site |
| When | 11, 12 & 13 March 2026 / 16, 17 & 18 September 2026 |
| Includes | Course materials, lunch, and certificate of completion |
| Price | € 2790 |
What will you learn?
By the end of this training, you will be able to:
- Understand the architecture of Real-Time and FPGA systems
- Configure hardware and manage network settings
- Access FPGA I/O via Scan Interface and FPGA Interface Mode
- Write LabVIEW FPGA code with loops, timings, and DMA FIFOs
- Set up communication between Host, Real-Time, and FPGA
- Deploy Real-Time applications with correct priorities and timing
Course Content
Platform Overview
- Hardware overview
- Typical system components
- Software requirements
- Terminology
Intro Real-Time & FPGA with LabVIEW
- Installation
- FPGA technology introduction
- Typical FPGA applications
- Hardware/software execution
- Why use LabVIEW FPGA systems?
- Development and compile process
- Project structure
Identify Requirements
- Determine requirements
- Determine I/O categories
- Determine I/O rates
- Define and architect processes
- Define Data Transfer Types
- Performance & Reliability requirements
Hardware Setup
- Hardware configuration
- Establish connection / configure network settings
- Update firmware
- Format disk / install software packages
FPGA Accessing I/O
- Introduction
- I/O types
- Accessing I/Os (Scan Interface Mode / FPGA Interface Mode)
LabVIEW FPGA Programming
- FPGA Loops / Timings
- PWM Generation (Registers)
- Clock Generation
- Single Cycle Timed Loop
- Pipelines / Derived Clocks
- Interrupts
- Building & deploying Bitfiles
- IP Reuse (SubVIs)
Host / FPGA Communication
- Concepts
- Libraries
- Memory Items
- DMA FIFOs
- FPGA Interface
- Bitfiles
LabVIEW Real-Time Programming
- Priorities & Timings
- RT FIFO
- Single Process Shared Variables
- Network Streams
- TCP/IP
RT Deployment
- Deploying Real-Time applications
Want to know more?
Contact us for available dates, in-company options or a customized training.
